Conventionally, in manufacturing a semiconductor device, exposure apparatuses with different exposure fields are often selectively used for exposure between different layers. For example, so-called mix and match exposure which uses the first exposure apparatus having a high magnification for exposure to a critical layer, and the second exposure apparatus having a low magnification for exposure to a rough layer is executed.
The layout of each shot positioned by a step and repeat operation is formed by a field-size layout exposed by the exposure apparatus. Focus leveling or alignment is performed based on this layout.
For example, the photolithography step for manufacturing a semiconductor element or the like adopts an exposure apparatus for transferring the pattern of a master (mask or reticle) onto a substrate (wafer, glass plate, or the like) coated with a photoresist. With the recent miniaturization of circuit patterns, a reduction projection exposure apparatus advantageous in resolving power and alignment precision is being employed.
In general, semiconductor elements are manufactured by forming a multilayered circuit pattern in a plurality of shot regions arrayed on a substrate by using different masters. These manufacturing techniques are widely applied in fields other than the semiconductor element manufacturing field. For example, in the magnetic head field, miniaturization is abruptly progressed in response to demands for larger storage capacity, similar to the semiconductor element field.
In the magnetic head manufacturing process, greatly different from the semiconductor element manufacturing process, the step of a pattern formed on a substrate level is several μm, which is much larger than a pattern step of 1 μm or less in the manufacture of a semiconductor element.
In the exposure apparatus, a plane position detection mechanism for aligning the position of a substrate serving as an object to be exposed to the image plane of an exposure region where the pattern of a master is projected comprises a surface level detection system of measuring a plurality of points within the exposure region on the substrate, as disclosed in U.S. Pat. Nos. 4,748,333 and 5,118,957. From pieces of surface level information at a plurality of points, the inclination and surface level within the exposure region are calculated and adjusted.
As for a method of removing a detection error between surface level detection systems, i.e., focus sensors arranged to measure a plurality of points within the exposure region, the detection error is detected and eliminated by a method as disclosed in U.S. Pat. No. 5,118,957.
As described in these patents, the current mainstream of a plane detection mechanism is to adopt an optical system whose light source is a laser, LED, or the like. Generally, in the optical system, the image of a slit illuminated by the light source is diagonally projected on a substrate serving as an object to be detected by using a projection imaging optical system. The slit image reflected by the substrate is formed again on a position detection element by using a light-receiving imaging optical system. Vertical movement of the substrate surface serving as an object to be detected is detected as the positional movement of the slit image on the position detection element.
In this optical system, the substrate surface serving as a surface to be detected is coated with a resist, and planarized satisfactorily enough to regard it as an optical mirror surface. The incident angle to the substrate surface is set to 70° or more to increase the reflectance on the planarized resist surface, thereby detecting the resist surface position.
The plane position detection mechanism comprises position detection systems at a plurality of points set within the exposure region in order to make the exposure region on the substrate coincide with the image plane of the projection optical system. The inclination within the exposure region and the surface level are measured and adjusted to achieve high-precision plane alignment. The difference on the substrate surface (step or difference in surface state caused by the process) detected by the position detection systems at a plurality of points is corrected to perform plane alignment always irrespective of the substrate surface state.
Conventionally, when exposure is done by, e.g., the second exposure apparatus in mix and match exposure using two exposure apparatuses having different exposure fields, layout information of an underlayer is not considered, and the focus precision may degrade. When a focus sensor to be used is determined based on the second exposure layout with respect to a substrate bearing the first exposure layout and focus operation is done, focus measurement is executed in a region where focus measurement points are not positioned on the same pattern. This generates a focus error, degrading the focus precision.
Also, when the focus sensor is located at the boundary between shots at the peripheral portion of a wafer, or when a TEG (test shot), or the like, is exposed, the lower pattern having focus measurement points is different from another region to be exposed. Thus, a focus detection error occurs, degrading the leveling precision.
As a method of calculating as a focus offset the measurement difference of the focus sensor generated depending on the lower pattern structure, Japanese Patent Laid-Open No. 2-102518 discloses a method of correcting the focus offset by using the periodicity of a pattern having a plurality of identical structures on the substrate. The conventional method does not consider underlayer information, and measurement fails on a pattern having identical structures. A detection error occurs, or the information amount on the substrate decreases. As a result, a measurement error may occur in the calculated focus offset.
As described above, a pattern is formed on a substrate on which an element is to be formed. For this reason, the substrate surface has steps and is corrugated. If the corrugations are relatively small, like a semiconductor element integrated circuit, they can be coped with by a conventional technique. In fields other than the semiconductor element field, especially in the magnetic head manufacturing process, some corrugations are very large, which degrades the focusing precision and plane alignment precision.
That is, if corrugations are relatively small, like a semiconductor element, the surface of a resist applied to a pattern can be regarded as a mirror surface. A beam incident on the surface is reflected at an almost predetermined reflection angle to form a high-quality slit image on the position detection element via the light-receiving imaging optical system.
To the contrary, if corrugations are large, a beam incident on the step boundary or slope is reflected into a deflected beam at a reflection angle different than on a flat resist surface in accordance with the degree of corrugations.
When the deflection angle is large, part or almost all of the reflected beam deflected by the light-receiving image optical system is eclipsed. The reflected beam poses a problem in forming a slit image on the position detection element again.
More specifically, the reformed slit image becomes asymmetric, or the slit image itself disappears. The detection precision decreases, or detection itself fails.
To solve this problem, the conventional optical plane position detection mechanism takes the following measures. That is, a slit image to be projected is enlarged to decrease the ratio at which corrugations occupy the region of the substrate surface where the slit image is reflected. Alternatively, the detection position of the substrate is moved only in measurement such that the position where the slit image is projected becomes a relatively flat portion almost free from the influence of corrugations.
Even if the size of the slit image is changed, the decrease in detection precision depending on the process cannot be completely prevented because the influence of steps remains. Upon changing the chip size and the chip array within the exposure region, i.e., shot, the detection positions of corrugations change, and surface level detection results vary. The conventional mechanism does not solve such essential problems.
Changing the detection position is effective for increasing the surface level detection precision of one sensor. In plane alignment, a plurality of focus position detection sensors are laid out at fixed positions within the shot. These sensors can only be set to the average positions of some or a plurality of sensors. Portions within chips that are measured by the respective sensors become indefinite depending on the chip layout. The sensors may measure the above-mentioned corrugations or slopes. The plane alignment precision degrades owing to the above reasons.